There are several issues in ESD/EMI Co-Design to consider before beginning the next design:
- What are the target robustness/susceptibility limits? For which Ports/Configurations?
- What component data are available? New revisions?
- What previous system data are available or applicable? Lessons Learned?
- What are the signal integrity/performance constraints?
- What are the cost constraints?
- Schedule limits? How much time can be spared now preventing, versus later fixing?
Characterizing the above list helps quantify expectations on the performance gamut.
Higher ESD protection may require a restriction on I/O bandwidth, and may add cost.
Higher bandwidth through an I/O port might force a practical limit on robustness or force higher costs.
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