ESD Scanning Presentation at MIT Lincoln Labs
Next Generation ESD Scanning Techniques for Protection Circuit Analysis and Debug
Presented Wednesday, March 12, 2014 at 5:30 PM to the IEEE Reliability Society and ESDA Boston Chapters.
While there are numerous solutions for characterizing and qualifying ESD transient robustness levels and hard-failures, there are extremely limited options for soft-failure, or "ESD upset" root-cause identification and analysis.
Pulse simulator systems have been developed by the industry with reasonable repeatability for product characterization and qualification. However, these techniques were never intended for use by the system design engineer as root-cause analysis and debug tools.
This presentation covers a new solution to this problem that has adapted EMI/EMC 3D scanning systems in conjunction with injected pulse generator simulators in both "current reconstruction" and transient susceptibility scanning modes. These systems attempt to identify which individual components and nodes actually "feel" the residual and induced transient pulses, how much, and to what effect.
The slides also outline a look toward the future of ESD scanning/reconstruction technology, including Embedded ESD Scanning from within the system.