Workshop A.2 IBIS Models for System Level ESD
Tuesady, September 9, 2014: 5:30 p.m. - 7:00 p.m. (Parallel Sessions)
Moderator: Fabrice Caignet, LAAS/CNRS
Panel Members:
- Robert Myoung, ANSYS
- Patrice Besse, Freescale
- Jeff Dunnihoo, Pragma Design
IBIS (Input/Output Buffer Information Specification), also known
as ANSI/EIA-656, is a standard behavioral model format used
to describe the electrical characteristics of the digital inputs and
outputs through V/I and V/T data. This has become more and more
popular among semiconductor vendors and system designers
because it can be provided without disclosing any proprietary
information. This workshop will address the following questions
such as: what is the latest development of IBIS models? Is this the
right model for system level ESD? How did IBIS models evolve?
Is IBIS suitable or unsuitable to provide TLP data characteristics?
Can the ESD community influence IBIS development to include
ESD specific requirements? What are the ESD data that must be
standardized and specified in a ESD-enabled IBIS model? If you
have started to develop IBIS models for system level ESD, or are
concerned about the direction of the IBIS models used for system
ESD, please join us for a lively discussion.
LINK:
View 2014 ESDA Symposium Program.
